| CPC H03K 17/16 (2013.01) | 23 Claims |
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1. A gate driver comprising:
a local ground node configured to provide a local ground potential;
a buffer configured to drive a device gate to the local ground potential during a switching cycle;
an inductive storage element configured to receive an inductive current and to drive the device gate below the local ground potential during the switching cycle; and
an inductor switch block configured to source the inductive current from a supply node and to subsequently sink the inductive current from the device gate during the switching cycle, wherein the inductor switch block comprises:
a p-channel field effect transistor (PFET) comprising a body-connected PFET source, a PFET drain, and a PFET gate; and
an n-type back-to-back switch comprising a back-to-back gate (i) configured to receive the local ground potential, (ii) electrically coupled to the local ground node, or (iii) electrically coupled to an alternating current (ac) ground node,
wherein the n-type back-to-back switch further comprises a first back-to-back drain/source, and a second back-to-back drain/source formed by a first n-type field effect transistor (NFET) electrically coupled to a second NFET,
wherein the first back-to-back drain/source is electrically coupled to the PFET drain, the second back-to-back drain/source is electrically coupled to the device gate, and the inductive storage element is electrically coupled between the PFET drain and the local ground node.
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