US 12,407,340 B2
Flux control architecture for 1st order noise insensitivity
Devin Underwood, Bronx, NY (US); Jiri Stehlik, New York, NY (US); David James Frank, Yorktown Heights, NY (US); Timothy Phung, Milpitas, CA (US); and David Zajac, Valley Cottage, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Nov. 30, 2021, as Appl. No. 17/538,013.
Prior Publication US 2023/0170889 A1, Jun. 1, 2023
Int. Cl. H03K 5/1252 (2006.01); G06N 10/40 (2022.01)
CPC H03K 5/1252 (2013.01) [G06N 10/40 (2022.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
a flux tunable qubit capacitively coupled to a flux tunable bus, wherein the flux tunable bus is capacitively coupled to a fixed frequency qubit;
a first controller than biases the flux tunable qubit at a first frequency where the flux tunable qubit is 1st order insensitive to flux noise; and
a second controller that biases the flux tunable bus at a second frequency where an amount of state dependent exchange rotation between the flux tunable qubit and the fixed frequency qubit satisfies a defined criterion, and modulates the flux tunable bus at a third frequency equal to an energy difference between qubit states |10custom character-|01custom character of the flux tunable qubit and the fixed frequency qubit.