US 12,407,339 B2
Attenuator using variable resistors
Lei Ma, Palo Alto, CA (US); Chenliang Du, San Diego, CA (US); and Antonino Scuderi, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jun. 21, 2023, as Appl. No. 18/338,685.
Prior Publication US 2024/0429907 A1, Dec. 26, 2024
Int. Cl. H03K 5/08 (2006.01); H03K 5/02 (2006.01)
CPC H03K 5/08 (2013.01) [H03K 5/02 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A signal processing circuit, comprising:
an impedance transformation circuit coupled between a first node and a second node; and
an attenuation circuit including:
a first variable resistive element including a first attenuation transistor coupled between the first node and a voltage rail; and
a second variable resistive element including a second attenuation transistor coupled between the second node and the voltage rail.