US 12,407,300 B2
Differential signal amplification circuit, digital isolator, and digital receiver
Qihui Chen, Suzhou (CN); and Yun Sheng, Suzhou (CN)
Assigned to SUZHOU NOVOSENSE MICROELECTRONICS CO., LTD., Suzhou (CN)
Appl. No. 17/926,616
Filed by SUZHOU NOVOSENSE MICROELECTRONICS CO., LTD., Suzhou (CN)
PCT Filed Feb. 7, 2021, PCT No. PCT/CN2021/075836
§ 371(c)(1), (2) Date Nov. 20, 2022,
PCT Pub. No. WO2021/232861, PCT Pub. Date Nov. 25, 2021.
Claims priority of application No. 202010430520.1 (CN), filed on May 20, 2020.
Prior Publication US 2023/0188097 A1, Jun. 15, 2023
Int. Cl. H03F 1/26 (2006.01); H03F 3/45 (2006.01); H04B 1/16 (2006.01)
CPC H03F 1/26 (2013.01) [H03F 3/45632 (2013.01); H03F 2200/372 (2013.01); H03F 2203/45454 (2013.01); H04B 1/16 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A differential signal amplification circuit, comprising:
a multi-stage differential amplifier and a common-mode transient adaptive biasing circuit;
wherein a positive input terminal and a negative input terminal of a primary differential amplifier of the multi-stage differential amplifier are connected to an input terminal of the common-mode transient adaptive biasing circuit; and
the common-mode transient adaptive biasing circuit is configured to detect a positive or negative common-mode transient interference signal at the positive input terminal and the negative input terminal, and provide a biasing current of a differential amplifier of at least one stage above a second stage when the positive or negative common-mode transient interference signals are detected.