US 12,407,256 B2
Switching regulator and control method thereof
Jiing-Horng Wang, Hsinchu (TW); Yu-Pin Tseng, Miaoli (TW); Chia-Jung Chang, Hsinchu (TW); Tsan-He Wang, New Taipei (TW); and Shao-Ming Chang, Keelung (TW)
Assigned to Richtek Technology Corporation, Hsinchu (TW)
Filed by Richtek Technology Corporation, Hsinchu (TW)
Filed on Oct. 25, 2023, as Appl. No. 18/493,826.
Claims priority of application No. 111144678 (TW), filed on Nov. 22, 2022.
Prior Publication US 2024/0171074 A1, May 23, 2024
Int. Cl. H02M 3/158 (2006.01); H02M 3/157 (2006.01); H02M 3/335 (2006.01)
CPC H02M 3/158 (2013.01) [H02M 3/157 (2013.01); H02M 3/33507 (2013.01)] 44 Claims
OG exemplary drawing
 
1. A switching regulator, comprising:
a power stage circuit, which is configured to operably control at least one power switch according to a pulse width modulation (PWM) signal, to switch an inductor coupled to a phase node, thus converting an input voltage to an output voltage;
a control circuit, which is configured to operably generate the PWM signal according to an operation clock signal; and
an operation clock signal generator circuit, which is configured to operably generate the operation clock signal, wherein the operation clock signal generator circuit includes:
a time point option unit, which is configured to operably generate a time point option signal according to a phase node voltage of the phase node during a ringing period subsequent to a blanking period, to indicate at least one available turn-on time point, or which is configured to operably generate a lowest voltage time point signal according to the phase node voltage during a tolerance period, to indicate a lowest voltage time point; and
a time point deciding unit, which is configured to operably decide the tolerance period according to a base clock signal and a tolerable frequency range and which is configured to operably select the available turn-on time point or the lowest voltage time point which occurs within the tolerance period to be a decided time point, so as to generate the operation clock signal;
wherein the decided time point is a time point which corresponds to a lowest phase node voltage within the tolerance period or an ending time point of the tolerance period;
wherein a beginning time point of the tolerance period is a time point obtained by counting a shortest tolerance period from a previous decided time point, wherein the shortest tolerance period corresponds to a highest frequency of the tolerable frequency range;
wherein an ending time point of the tolerance period is a time point obtained by counting a longest tolerance period from a previous decided time point, wherein the longest tolerance period corresponds to a lowest frequency of the tolerable frequency range;
wherein the ringing period occurs during a dead time when the switching regulator operates in a discontinuous conduction mode (DCM).