US 12,407,251 B2
Systems and methods for improving efficiency in a power converter using cascode power stages
Richard Nicholson, Aptos, CA (US); and Feng Yuan, Union City, CA (US)
Assigned to Empower Semiconductor, Inc., San Jose, CA (US)
Filed by Empower Semiconductor, Inc., San Jose, CA (US)
Filed on Dec. 15, 2022, as Appl. No. 18/066,914.
Claims priority of provisional application 63/292,359, filed on Dec. 21, 2021.
Prior Publication US 2023/0198388 A1, Jun. 22, 2023
Int. Cl. H02M 3/155 (2006.01)
CPC H02M 3/155 (2013.01) 20 Claims
OG exemplary drawing
 
1. A power converter circuit comprising:
a first power stage including a first switch having a first gate terminal, a first drain terminal and a first source terminal, and a second switch having a second gate terminal, a second drain terminal and a second source terminal, the first source terminal directly coupled without having any other intervening elements in between to the second drain terminal;
a second power stage including a third switch having a third gate terminal, a third drain terminal and a third source terminal, and a fourth switch having a fourth gate terminal, a fourth drain terminal and a fourth source terminal, the third source terminal directly coupled to the fourth drain terminal, wherein the second power stage is coupled in parallel to the first power stage such that the first drain terminal is coupled to the third drain terminal and the second source terminal is connected to the fourth source terminal;
an input terminal coupled to a first terminal of an impedance element;
an output terminal coupled to a second terminal of the impedance element and to the first and third drain terminals; and
a control circuit arranged to couple the first gate terminal to a DC bias during a first state and to couple the first gate terminal to the first source terminal during a second state.