US 12,406,957 B2
Spacers for semiconductor device assemblies
Bong Woo Choi, Singapore (SG)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 18, 2022, as Appl. No. 17/890,834.
Prior Publication US 2024/0063166 A1, Feb. 22, 2024
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/32 (2013.01) [H01L 24/16 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device assembly, comprising:
a substrate;
a frame structure disposed on the substrate, the frame structure comprising peripheral walls defining an enclosed region;
a spacer disposed on the substrate within the enclosed region and restrained by the frame structure, the spacer being nonconductive;
a semiconductor die disposed on the substrate and disposed adjacent to the frame structure and the spacer; and
an underfill material layer that is in contact with the peripheral walls of the frame structure and that extends under the semiconductor die.