| CPC H01L 24/08 (2013.01) [H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1436 (2013.01)] | 20 Claims |

|
1. A memory device, comprising:
a memory cell comprising a vertical transistor, and a storage unit having a first end coupled to a first terminal of the vertical transistor, the vertical transistor comprising a semiconductor body extending in a first direction, and a gate structure coupled to at least one side of the semiconductor body;
a metal bit line coupled to a second terminal of the vertical transistor via an ohmic contact and extending in a second direction perpendicular to the first direction;
a dielectric layer opposing the memory cell with the metal bit line positioned between the dielectric layer and the memory cell; and
a conductor extending in the first direction from the dielectric layer to couple to a second end of the storage unit, wherein in the first direction, a length of the conductor is greater than a length of the semiconductor body of the vertical transistor.
|