US 12,406,935 B2
Semiconductor device package
Sang Youl Lee, Seoul (KR); Ki Man Kang, Seoul (KR); and Eun Dk Lee, Seoul (KR)
Assigned to SUZHOU LEKIN SEMICONDUCTOR CO., LTD., Taicang (CN)
Filed by SUZHOU LEKIN SEMICONDUCTOR CO., LTD., Suzhou (CN)
Filed on Jan. 5, 2024, as Appl. No. 18/405,806.
Application 18/405,806 is a continuation of application No. 16/979,734, granted, now 11,894,307, previously published as PCT/KR2019/004032, filed on Apr. 5, 2019.
Claims priority of application No. 10-2018-0039893 (KR), filed on Apr. 5, 2018; and application No. 10-2018-0049083 (KR), filed on Apr. 27, 2018.
Prior Publication US 2024/0222285 A1, Jul. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/538 (2006.01); H01L 25/075 (2006.01); H10H 20/857 (2025.01)
CPC H01L 23/5386 (2013.01) [H01L 25/075 (2013.01); H10H 20/857 (2025.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device package comprising:
a substrate;
a plurality of semiconductor structures disposed to be spaced apart from each other at a central portion of the substrate,
wherein the semiconductor structure is disposed on the substrate and comprises a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer disposed on the first conductivity-type semiconductor layer, and an active layer disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer;
a first recess formed to pass through the second conductivity-type semiconductor layer, the active layer and extends to a partial region of the first conductivity-type semiconductor layer;
a first electrode disposed on the first conductivity-type semiconductor layer and electrically connected to the first conductivity-type semiconductor layer;
a second electrode disposed below the second conductivity-type semiconductor layer and electrically connected to the second conductivity-type semiconductor layer;
a plurality of first interconnection lines disposed between the substrate and the plurality of semiconductor structures and electrically connected to the first conductivity-type semiconductor layer through the first electrode;
a plurality of second interconnection lines disposed between the substrate and the plurality of semiconductor structures and electrically connected to the second conductivity-type semiconductor layer through the second electrode; and
a reflective layer disposed between the second electrode and the second interconnection line,
wherein the first electrode is disposed in the first recess.