US 12,406,920 B2
Top via interconnect with airgap
Kenneth Chun Kuen Cheng, Shatin (HK); Koichi Motoyama, Clifton Park, NY (US); Chanro Park, Clifton Park, NY (US); and Chih-Chao Yang, Glenmont, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Feb. 17, 2022, as Appl. No. 17/651,432.
Prior Publication US 2023/0260895 A1, Aug. 17, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76802 (2013.01); H01L 21/7682 (2013.01); H01L 23/53295 (2013.01); H01L 21/76843 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a first metal line;
a top via above and directly contacting the first metal line;
a second metal line adjacent to the first metal line;
a first dielectric contacting sidewalls of the top via;
a second dielectric directly between the first dielectric and the second metal line, wherein upper surfaces of the top via, the first dielectric, and the second dielectric are substantially flush; and
an air gap located between the first metal line and the second metal line, and below both the first dielectric and the second dielectric.