US 12,406,918 B2
Printed circuit board and electronic component package
Suk Chang Hong, Suwon-si (KR); Yong Duk Lee, Suwon-si (KR); Sang Hoon Kim, Suwon-si (KR); Ki Gon Kim, Suwon-si (KR); Woo Jeong Choi, Suwon-si (KR); and Cheol Min Shin, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on May 13, 2022, as Appl. No. 17/743,775.
Claims priority of application No. 10-2022-0000391 (KR), filed on Jan. 3, 2022.
Prior Publication US 2023/0215794 A1, Jul. 6, 2023
Int. Cl. H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/12 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/34 (2006.01)
CPC H01L 23/49838 (2013.01) [H01L 21/4857 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H05K 2201/09845 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A printed circuit board comprising:
a substrate layer in which a plurality of insulating layers and a plurality of wiring patterns are repeatedly layered in a thickness direction, the substrate layer including a conductive via layer disposed in one of the plurality of insulating layers to connect wiring patterns, among the plurality of wiring patterns, disposed on upper and lower surfaces of the one of the plurality of insulating layers, respectively;
an uppermost substrate layer including an outermost insulating layer disposed on an outermost surface of the substrate layer, and a first upper wiring pattern disposed in the outermost insulating layer;
a bump pad disposed on a portion of an upper surface of the first upper wiring pattern and having a length shorter than a length of the first upper wiring pattern; and
a solder resist layer having a first hole exposing the bump pad, and having a height greater than that of the bump pad with respect to an upper surface of the outermost insulating layer,
wherein in a cross section of the printed circuit board cut in the thickness direction, a side surface of the bump pad extends in the thickness direction,
another portion of the upper surface of the first upper wiring pattern is lower than the upper surface of the outermost insulating layer, and
the outermost insulating layer has a solder dam protruding so as to be higher than the another portion of the upper surface of the first upper wiring pattern.