CPC H01L 23/49548 (2013.01) [H01L 21/4825 (2013.01); H01L 23/49524 (2013.01)] | 12 Claims |
1. A method, comprising:
arranging at least one semiconductor chip over a substrate;
arranging a plurality of current-carrying formations coupled to the at least one semiconductor chip;
wherein the substrate does not include electrically conductive formations that electrically couple two or more current-carrying formations of the plurality of current-carrying formations to each other; and
forming at least one electrical contact between adjacent ones of the current-carrying formations in the plurality of current-carrying formations to provide a multi-formation current-carrying channel.
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