CPC H01L 23/427 (2013.01) [H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01Q 3/24 (2013.01); H03F 3/245 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06589 (2013.01); H03F 2200/447 (2013.01); H03F 2200/451 (2013.01)] | 20 Claims |
1. An array core block for an Active Electronically Steerable Array (AESA) for operating frequencies above 50 GHz, said array core block comprising:
a stack of 2*M alternating N-channel RFIC and MMIC Power Amplifier chips bonded together by a wafer-scale direct bond interconnect process to form M bonded pairs of an M×N element array core block;
an array of through substrate metal vias that extend vertically through the stack to (a) distribute a DC bias to the MMIC Power Amplifier chips and local oscillator (LO) and information signals to the chips and (b) connect the N output channels of the RFIC chip to drive corresponding input channels of the MIMIC Power Amplifier chip to drive respective antenna elements integrated on the MIMIC Power Amplifier such that the M×N element array core block forms a steerable RF beam at the operating frequency; and
a cooling system including micro-channels formed on a backside of at least one of the chips in each bonded pair and through substrate via holes formed through the stack that operatively couple the micro-channels for all of the bonded pairs to receive and circulate a fluid through the micro-channels and through substrate via holes to cool the RFIC and MMIC Power Amplifier chips and to extract the heated fluid.
|