	US 12,406,847 B2
	Microelectronic devices and related methods of fabricating microelectronic devices
Andrew M. Bayless, Boise, ID (US); and Brandon P. Wirz, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Sep. 18, 2023, as Appl. No. 18/469,431.
Application 18/469,431 is a continuation of application No. 17/241,386, filed on Apr. 27, 2021, granted, now 11,784,050.
Prior Publication US 2024/0006179 A1, Jan. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/78 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01); H01L 21/768 (2006.01); H01L 25/065 (2023.01); H01L 21/304 (2006.01); H01L 23/00 (2006.01); H01L 25/18 (2023.01); H10D 62/10 (2025.01)

CPC H01L 21/26506 (2013.01) [H01L 21/324 (2013.01); H01L 21/76859 (2013.01); H01L 21/78 (2013.01); H01L 25/0657 (2013.01); H01L 21/265 (2013.01); H01L 21/26513 (2013.01); H01L 21/304 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 25/18 (2013.01); H01L 2224/32146 (2013.01); H10D 62/117 (2025.01)]

17 Claims

1. A microelectronic device, comprising:

a semiconductor material comprising:

a perimeter region including residual ions and one or more of point defects and dislocations resulting from ion implantation extending from an outer edge of the perimeter region; and

an active region substantially free from point defects and dislocations caused by ion implantation; and

a barrier positioned between the active region and the perimeter region of the semiconductor material.