US 12,406,783 B2
Circuit protection device
Chien Hui Wu, Zhudong Township (TW); Yung-Hsien Chang, Douliu (TW); Cheng-Yu Tung, Tainan (TW); Ming-Hsun Lu, Taoyuan (TW); and Yi-An Sha, Xindian (TW)
Assigned to POLYTRONICS TECHNOLOGY CORP., Hsinchu (TW)
Filed by Polytronics Technology Corp., Hsinchu (TW)
Filed on Jan. 13, 2023, as Appl. No. 18/154,599.
Claims priority of application No. 111131804 (TW), filed on Aug. 24, 2022.
Prior Publication US 2024/0071656 A1, Feb. 29, 2024
Int. Cl. H01C 7/02 (2006.01); H01C 1/01 (2006.01); H01C 1/14 (2006.01)
CPC H01C 7/021 (2013.01) [H01C 1/01 (2013.01); H01C 1/1406 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A circuit protection device having an upper surface, a lower surface opposite to the upper surface, and a peripheral wall connected between the upper surface and the lower surface, the circuit protection device comprising:
a first temperature sensitive resistor comprising a first upper electrically conductive layer, a first lower electrically conductive layer, and a first positive temperature coefficient (PTC) layer laminated between the first upper electrically conductive layer and the first lower electrically conductive layer;
a second temperature sensitive resistor comprising a second upper electrically conductive layer, a second lower electrically conductive layer, and a second PTC layer laminated between the second upper electrically conductive layer and the second lower electrically conductive layer;
an electrically insulating multilayer having an upper insulating layer, a middle insulating layer, and a lower insulating layer, wherein:
the upper insulating layer extends beyond the first upper electrically conductive layer, whereby the first upper electrically conductive layer is entirely covered and the first PTC layer is partially covered by the upper insulating layer;
the middle insulating layer is laminated between the first lower electrically conductive layer and the second upper electrically conductive layer, thereby bonding the first temperature sensitive resistor to the second temperature sensitive resistor; and
the lower insulating layer extends beyond the second lower electrically conductive layer, whereby the second lower electrically conductive layer is entirely covered and the second PTC layer is partially covered by the lower insulating layer;
a right notch and a left notch, wherein the upper insulating layer is attached between the first electrode layer and the first upper electrically conductive layer, so as to space the first electrode layer apart from the first upper electrically conductive layer by a distance, and wherein the first electrode layer and the first upper electrically conductive layer are parallel to each other, and extend to the right notch, thereby electrically connecting to each other through the right notch;
a first electrode layer and a second electrode layer attached to the upper insulating layer and the lower insulating layer, respectively, wherein the first electrode layer is electrically connected to the first upper electrically conductive layer and the second upper electrically conductive layer, and the second electrode layer is electrically connected to the first lower electrically conductive layer and the second lower electrically conductive layer; and
a first external electrode disposed on the first electrode layer, wherein the first external electrode extends beyond the peripheral wall along a first horizontal direction parallel to the first electrode layer.