US 12,406,737 B2
Semiconductor device and operating method of semiconductor device
Byeong Ju Jin, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on May 30, 2023, as Appl. No. 18/325,132.
Claims priority of application No. 10-2023-0010214 (KR), filed on Jan. 26, 2023.
Prior Publication US 2024/0257882 A1, Aug. 1, 2024
Int. Cl. G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/24 (2006.01)
CPC G11C 16/26 (2013.01) [G11C 16/0433 (2013.01); G11C 16/24 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a bit line;
memory strings connected to the bit line and having different sizes;
a page buffer including at least a sensing node and a sensing transistor configured to couple the bit line and the sensing node in response to a sensing signal,
wherein, during an evaluation period of the page buffer, resistance of a current path formed from the bit line to the sensing node is adjusted based on a size of a memory string selected among the memory strings.