US 12,406,724 B2
Resistive memory with selector, equipped with a write capacitor, and associated writing method
Paola Trotti, Grenoble (FR); Gabriel Molas, Grenoble (FR); Gaël Pillonnet, Grenoble (FR); Anthonin Verdy, Grenoble (FR); and Amir Regev, Modiin (IL)
Assigned to COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES, Paris (FR); and WEEBIT NANO LTD, Hod Hasharon (IL)
Filed by COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES, Paris (FR); and WEEBIT NANO LTD, Hodhasharon (IL)
Filed on Dec. 12, 2022, as Appl. No. 18/079,325.
Claims priority of application No. 2113463 (FR), filed on Dec. 14, 2021.
Prior Publication US 2023/0186987 A1, Jun. 15, 2023
Int. Cl. G11C 13/00 (2006.01)
CPC G11C 13/0069 (2013.01) [G11C 13/0038 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A memory comprising an array of resistive memory cells of a same type including at least one memory cell to be programmed, a write device to program the at least one memory cell to be programmed and a connection device configured to selectively connect the at least one memory cell to be programmed to the write device, or to connect a given group of memory cells of the array to the write device,
the array comprising row electrical tracks and column electrical tracks, each memory cell being connected between one of the row electrical tracks and one of the column electrical tracks, the memory cell comprising:
a memory element having at least a highly resistive state and a lowly resistive state, and
a selector arranged in series with the memory element, the selector being electrically conductive when a voltage greater than a given threshold voltage is applied to the selector, and provided that a current flowing through the selector is greater than a given holding current,
the write device comprising at least one write capacitor and one charging device, and being configured to:
a) charge the write capacitor with the charging device to a given initial write voltage, and then
b) connect the write capacitor thus charged, to the at least one memory cell to be programmed by the connection device, to program said cell,
wherein the charging device comprises:
different voltage sources, and
a multiplexer having: different inputs connected respectively to said different voltage sources, and an output connected to the write capacitor, to selectively connect either of said sources to the write capacitor.