US 12,406,638 B2
Digital-to-analog converter, data driver, and display device
Hiroshi Tsuchi, Yokohama (JP)
Assigned to LAPIS Technology Co., Ltd., Yokohama (JP)
Filed by LAPIS Technology Co., Ltd., Yokohama (JP)
Filed on Apr. 23, 2024, as Appl. No. 18/644,049.
Claims priority of application No. 2023-072303 (JP), filed on Apr. 26, 2023.
Prior Publication US 2024/0363086 A1, Oct. 31, 2024
Int. Cl. G09G 3/36 (2006.01); G09G 3/3275 (2016.01); H03F 3/45 (2006.01); H03M 1/06 (2006.01)
CPC G09G 3/3688 (2013.01) [G09G 3/3275 (2013.01); H03F 3/45183 (2013.01); H03M 1/0682 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A digital-to-analog converter, configured to convert digital data into an analog output voltage signal, the digital-to-analog converter comprising:
a decoder selecting two voltages including overlap from a plurality of reference voltages as a first voltage and a second voltage, based on the digital data; and
a differential amplifier circuit outputting a signal, which has one voltage value corresponding to the digital data among voltage values obtained by dividing a voltage between the first voltage and the second voltage into N (N is a natural number expressed as a power of 2), as the output voltage signal,
wherein the differential amplifier circuit comprises:
first to Nth differential stages of a first conductivity type each receiving the first voltage or the second voltage at a non-inverting input terminal thereof to cause a differential current corresponding to the first voltage or the second voltage to flow to a first node, and receiving the output voltage signal at an inverting input terminal thereof to cause a differential current corresponding to the output voltage signal to flow to a second node;
a single differential stage of a second conductivity type receiving one voltage of the first voltage and the second voltage at a non-inverting input terminal thereof and receiving the output voltage signal at an inverting input terminal thereof, and being activated in a case where a digital value indicated by the digital data is included in a predetermined range to cause a differential current corresponding to the one voltage received at the non-inverting input terminal thereof to flow to a third node and cause a differential current corresponding to the output voltage signal received at the inverting input terminal thereof to flow to a fourth node; and
an output amplification stage outputting, as the output voltage signal, a voltage generated at an output terminal by causing an output current corresponding to a difference between the differential currents respectively flowing to the first node and the second node, or a difference between the differential currents respectively flowing to the third node and the fourth node to the output terminal.