| CPC G09G 3/3233 (2013.01) [G09G 3/32 (2013.01); H10K 59/123 (2023.02); H10K 59/131 (2023.02); H10K 77/111 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0809 (2013.01); G09G 2320/02 (2013.01); H10K 2102/311 (2023.02)] | 21 Claims |

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1. A display device, comprising:
a substrate including a display area including a plurality of pixels, and a peripheral area at least partially surrounding the display area;
a first transistor disposed in each of the plurality of pixels, the first transistor including a semiconductor layer including a channel area;
an overlap layer disposed between the channel area of the first transistor and the substrate in a sectional view, the overlap layer overlapping the channel area of the first transistor in a plan view; and
a driving voltage line disposed over the first transistor in the sectional view and transmitting a driving voltage,
wherein the overlap layer is supplied with the driving voltage through a contact hole which is for electrical connection between the overlap layer and the driving voltage line, and
wherein the contact hole is not disposed in an area of the pixel.
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