| CPC G09G 3/2092 (2013.01) [G06F 1/26 (2013.01); G06F 1/3203 (2013.01); H02M 1/0003 (2021.05); H02M 1/0016 (2021.05); H02M 1/0025 (2021.05); H02M 1/0029 (2021.05); H02M 1/44 (2013.01); H03K 17/16 (2013.01); H03K 17/165 (2013.01); H03K 17/166 (2013.01); H03K 19/00346 (2013.01); G09G 2330/021 (2013.01); G09G 2330/06 (2013.01); H03K 2217/0081 (2013.01)] | 18 Claims |

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1. An electromagnetic interference modulation circuit, comprising:
a slew rate adjustment circuit, configured to generate a plurality of electromagnetic interference modulation signals, and output an electromagnetic interference modulation signal corresponding to a selecting signal;
a power stage circuit, connected to the slew rate adjustment circuit and an output end, configured to output a voltage signal to the output end according to the electromagnetic interference modulation signal; and
a sampling feedback circuit, electrically connected to the power stage circuit and the output end, configured to obtain the voltage signal and provide a duty cycle modulation signal to the power stage circuit according to the voltage signal,
wherein the slew rate adjustment circuit further comprises a plurality of electromagnetic interference modulation units, all electrically connected with the power stage circuit, configured to control a corresponding electromagnetic interference modulation unit to output the electromagnetic interference modulation signal according to the selecting signal,
wherein each of the plurality of electromagnetic interference modulation units comprises a first transistor and a second transistor in a push-pull form and configured to amplify signals at gates of the first transistor and the second transistor.
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