US 12,406,607 B2
Pixel circuit
Chih-Lung Lin, Tainan (TW); Yi-Jui Chen, Tainan (TW); Jui-Hung Chang, Taichung (TW); Yi-Chien Chen, Tainan (TW); Ming-Yang Deng, Hsinchu (TW); and Ming-Hung Chuang, Hsinchu (TW)
Assigned to AUO Corporation, Hsinchu (TW)
Filed by AUO Corporation, Hsinchu (TW)
Filed on Jul. 17, 2024, as Appl. No. 18/774,929.
Claims priority of application No. 112127431 (TW), filed on Jul. 21, 2023.
Prior Publication US 2025/0029538 A1, Jan. 23, 2025
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/2003 (2013.01) [G09G 2300/0842 (2013.01); G09G 2310/0243 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A pixel circuit, comprising:
a light-emitting element, coupled to a power supply voltage;
a drive current generating circuitry, coupled to the light-emitting element and providing a drive current through a drive current path to drive the light-emitting element;
a pulse width signal generating circuitry, providing a pulse width signal to a control terminal of a light-emitting control switch on the drive current path; and
a multiple lighting controlling circuitry, coupled between the control terminal of the light-emitting control switch and the drive current generating circuitry, and adjusting the pulse width signal according to a multiple emission control signal to allow the light-emitting element to perform multi-emission, wherein the drive current generating circuitry comprises:
a first transistor, coupled between the light-emitting element and a first reference voltage, wherein a control terminal of the first transistor receives a scan signal;
a second transistor, connected in series with the light-emitting control switch between the light-emitting element and a reference ground voltage, wherein the light-emitting control switch is a third transistor;
a fourth transistor, one end thereof being coupled to the light-emitting element, wherein a control terminal of the fourth transistor receives an emission control signal;
a fifth transistor, coupled between one end of the second transistor and a control terminal of the second transistor, wherein a control terminal of the fifth transistor receives the scan signal;
a sixth transistor, connected in series with the fourth transistor between another end of the second transistor and a first data voltage, wherein a control terminal of the sixth transistor receives the emission control signal;
a first capacitor, coupled between a common junction of the fourth transistor and the sixth transistor and the control terminal of the second transistor; and
a seventh transistor, coupled between the control terminal of the second transistor and a second reference voltage, wherein a control terminal of the seventh transistor receives a previous-stage scan signal.