US 12,406,117 B1
Generating and utilizing manufacturable netlists of three-dimensional integrated circuits
Xun Liu, Cary, NC (US)
Assigned to Synopsys, Inc., Mountain View, CA (US)
Filed by Synopsys, Inc., Mountain View, CA (US)
Filed on Jul. 29, 2022, as Appl. No. 17/877,266.
Claims priority of provisional application 63/233,441, filed on Aug. 16, 2021.
Int. Cl. G06F 30/327 (2020.01); G06F 30/3947 (2020.01); G06F 30/3953 (2020.01)
CPC G06F 30/327 (2020.01) [G06F 30/3947 (2020.01); G06F 30/3953 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
generating, by a processing device, a routing graph in accordance with a three-dimensional integrated circuit (3DIC) configuration of a 3DIC device;
performing, by the processing device, net routing with respect to the routing graph;
determining, by the processing device and based on a net routing result of the net routing, whether at least one valid modified routing graph exists in view of an initial netlist corresponding to the 3DIC device;
in response to determining that at least one valid modified routing graph exists, selecting, by the processing device, a modified routing graph from the at least one valid modified routing graph; and
generating, by the processing device and based on the modified routing graph, an updated netlist that satisfies the 3DIC configuration and is logically equivalent to the initial netlist.