US 12,406,077 B2
Logic circuitry package for print apparatus
Jefferson P. Ward, Vancouver, WA (US); Stephen D. Panshin, Corvallis, OR (US); and Kyle Michel, Vancouver, WA (US)
Assigned to Hewlett-Packard Development Company, L.P., Spring, TX (US)
Appl. No. 17/802,390
Filed by HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P., Spring, TX (US)
PCT Filed Apr. 30, 2020, PCT No. PCT/US2020/030860
§ 371(c)(1), (2) Date Aug. 25, 2022,
PCT Pub. No. WO2021/221678, PCT Pub. Date Nov. 4, 2021.
Prior Publication US 2023/0109232 A1, Apr. 6, 2023
Int. Cl. G06F 21/60 (2013.01); G06F 21/85 (2013.01); H04L 9/08 (2006.01)
CPC G06F 21/608 (2013.01) [G06F 21/85 (2013.01); H04L 9/088 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A logic circuitry package for a print apparatus comprising:
a serial data bus interface to interface with a serial data bus, the logic circuit to respond to messages from the print apparatus over the serial data bus directed to a number of different addresses using different component keys for cryptographic authentication corresponding to each different address, the different component keys related to at least one master key of the print apparatus and calculated for each different address from the at least one master key and based on a unique ID associated with each of the different addresses; and
control logic, in response to a session initiation request message on the serial data bus from the print apparatus to establish a secure communication session related to one of the different addresses, the control logic to cryptographically authenticate responses to each subsequent message of the secure communication session from the print apparatus using a component key corresponding to the address.