US 12,405,915 B2
Waveform-aware mixed signal measurement system for bus traffic reduction in system-on-a-chip devices
Mustafa Keskin, San Diego, CA (US); and Guoqing Miao, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Sep. 8, 2023, as Appl. No. 18/464,136.
Prior Publication US 2025/0086138 A1, Mar. 13, 2025
Int. Cl. H03M 1/12 (2006.01); G01R 31/317 (2006.01); G06F 1/3296 (2019.01); G06F 15/78 (2006.01)
CPC G06F 15/781 (2013.01) [G01R 31/31721 (2013.01); G06F 1/3296 (2013.01); H03M 1/121 (2013.01); G06F 2213/0038 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A processor-implemented method, comprising:
receiving a mixed signal in a computing device including a system-on-a-chip (SoC);
detecting one or more polarity changes of a slope of a waveform corresponding to the mixed signal; and
selectively disabling one or more of an analog-to-digital converter (ADC) or at least a portion of SoC bus traffic related to ADC operation between one or more polarity changes in the slope of the waveform.