US 12,405,905 B2
Storage device for high speed link startup and storage system including the same
Dongwoo Nam, Seongnam-si (KR); Sungho Seo, Suwon-si (KR); Kwanwoo Noh, Seoul (KR); Myungsub Shin, Suwon-si (KR); and Haesung Jung, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-Do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 12, 2024, as Appl. No. 18/438,795.
Application 18/438,795 is a continuation of application No. 18/304,782, filed on Apr. 21, 2023, granted, now 11,934,691.
Application 18/304,782 is a continuation of application No. 17/328,225, filed on May 24, 2021, granted, now 11,675,531, issued on Jun. 13, 2023.
Claims priority of application No. 10-2020-0073919 (KR), filed on Jun. 17, 2020; and application No. 10-2020-0167668 (KR), filed on Dec. 3, 2020.
Prior Publication US 2024/0184480 A1, Jun. 6, 2024
Int. Cl. G06F 13/16 (2006.01); G06F 3/06 (2006.01); G06F 13/38 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/1668 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 13/385 (2013.01); G06F 13/4278 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
an interconnect part comprising at least one receiver and at least one transmitter, the interconnect part configured to perform data communication through a transmission lane and a reception lane among at least one lane connected between a host device and the storage device;
a nonvolatile memory; and
a storage controller configured to control the nonvolatile memory,
wherein the storage controller is further configured for the at least one transmitter to transmit a high speed link up message to the host device through the transmission lane such that a line in the transmission lane transitions from a zero differential line voltage DIF-Z to an activate period having a negative differential line voltage DIF-N, and configured to perform link startup in a high speed mode through the transmission lane and the reception lane based on the high speed link up message when a low speed link up message is not received from the host device through the reception lane within a set time from a transmission of the high speed link up message,
wherein the storage device is configured to perform an initialization operation and then transmit the high speed link up message to the host device, and
wherein, when a length of the activate period is less than a reference time, the transmission lane and the reception lane enter the high speed mode.