US 12,405,763 B2
Image processor circuit supporting two-pixel mode and picture-in-picture mode and image processing method thereof
Hui Huang, Jiangsu Province (CN); Chia-Wei Yu, Hsinchu (TW); Tien-Hung Lin, Hsinchu (TW); and Jiamei Feng, Jiangsu Province (CN)
Assigned to Realtek Semiconductor Corporation, Hsinchu (TW)
Filed by Realtek Semiconductor Corporation, Hsinchu (TW)
Filed on Nov. 17, 2023, as Appl. No. 18/512,045.
Claims priority of application No. 202310495075.0 (CN), filed on May 5, 2023.
Prior Publication US 2024/0370221 A1, Nov. 7, 2024
Int. Cl. G06F 3/147 (2006.01); G06T 1/60 (2006.01); G09G 5/00 (2006.01)
CPC G06F 3/147 (2013.01) [G06T 1/60 (2013.01); G09G 5/006 (2013.01); G09G 2340/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An image processor circuit, comprising:
a first processor circuit; and
a second processor circuit,
wherein in a two-pixel mode, the first processor circuit is configured to process a first part of first input data and the second processor circuit is configured to process a second part of the first input data to generate output data for a display panel to display,
wherein in a picture-in-picture mode, the first processor circuit is configured to process second input data to generate main-picture output data and the second processor circuit is configured to process third input data to generate sub-picture output data for the display panel to display.