US 12,405,652 B2
System and method for controlling power consumption in processor using interconnected event counters and weighted sum accumulators
Richard Martin Born, Fort Collins, CO (US); Gokul Subramani Ramalingam Lakshmi Devi, Santa Clara, CA (US); Michael L. Golden, Santa Clara, CA (US); and Larry D. Hewitt, Austin, TX (US)
Assigned to ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Jun. 25, 2021, as Appl. No. 17/358,709.
Prior Publication US 2022/0413584 A1, Dec. 29, 2022
Int. Cl. G06F 1/3228 (2019.01)
CPC G06F 1/3228 (2013.01) 17 Claims
OG exemplary drawing
 
1. A processing system comprising at least one execution unit and at least one processor engine operatively coupled with the at least one execution unit, the at least one execution unit comprising:
at least one first event count component configured to:
monitor a plurality of distributed events in the execution unit, and
calculate an accumulated weighted sum of the plurality of distributed events;
a first master accumulation component coupled with the first event count component, the first master accumulation component configured to:
determine an excess power consumption by comparing the accumulated weighted sum with a threshold power value, and
adjust power consumption of the respective execution unit based on the determined excess power consumption; and
the at least one processor engine comprising:
a first slave interface operably coupled with the first master accumulation component, the first slave interface configured to receive the accumulated weighted sum from the first master accumulation component;
at least one second event count component configured to:
receive from the first slave interface the accumulated weighted sum,
monitor a plurality of distributed events in the processor engine, and
calculate a second accumulated weighted sum of the distributed events including the accumulated weighted sum from the first master accumulation component; and
a second master accumulation component configured to:
determine an aggregated power consumption for the execution unit and the processor engine based on the second accumulated weighted sum,
determine the excess power consumption by comparing the aggregated power consumption with the threshold power value, and
adjust power consumption of the respective execution unit or the processor engine based on the determined excess power consumption.