US 12,405,536 B2
Method for optimizing light source in integrated circuit manufacturing and electronic device
Ge Yan, Shenzhen (CN); and Ming Ding, Shenzhen (CN)
Assigned to SHENZHEN JINGYUAN INFORMATION TECHNOLOGY CO., LTD, Shenzhen (CN)
Filed by SHENZHEN JINGYUAN INFORMATION TECHNOLOGY CO., LTD, Shenzhen (CN)
Filed on May 19, 2023, as Appl. No. 18/320,223.
Application 18/320,223 is a continuation of application No. PCT/CN2020/132974, filed on Nov. 30, 2020.
Claims priority of application No. 202011314971.5 (CN), filed on Nov. 20, 2020.
Prior Publication US 2023/0288816 A1, Sep. 14, 2023
Int. Cl. G03F 7/00 (2006.01)
CPC G03F 7/7055 (2013.01) [G03F 7/70125 (2013.01); G03F 7/70504 (2023.05); G03F 7/70508 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method for optimizing a light source in integrated circuit manufacturing, comprising following steps:
S1, providing an initial light source;
S20, pixelating the initial light source, setting a light source intensity threshold, removing light source pixels below the light source intensity threshold and removing isolated light source pixels;
S2, performing region segmentation according to light intensity distribution of the initial light source to obtain a plurality of sub light source regions;
S3, providing at least two matching patterns and matching them with each sub light source region to obtain at least two matching results corresponding to each sub light source region;
S4, performing calculating based on the at least two matching results and each sub light source region to obtain a best matching pattern corresponding to each sub light source region; and
S5, generating a light source to be optimized based on the best matching pattern corresponding to each sub light source region.