US 12,405,226 B2
Substrate inspection apparatus and substrate inspection method
Jangwoon Sung, Suwon-si (KR); Lei Tian, Boston, MA (US); Hao Wang, Boston, MA (US); Jiabei Zhu, Boston, MA (US); Myungjun Lee, Suwon-si (KR); Wookrae Kim, Suwon-si (KR); Seungbeom Park, Suwon-si (KR); Junho Shin, Suwon-si (KR); and Hojun Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do (KR); and TRUSTEES OF BOSTON UNIVERSITY, Boston, MA (US)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 24, 2023, as Appl. No. 18/493,226.
Claims priority of application No. 10-2023-0000481 (KR), filed on Jan. 3, 2023.
Prior Publication US 2024/0219315 A1, Jul. 4, 2024
Int. Cl. G01N 21/95 (2006.01); G01N 21/88 (2006.01); G01N 21/956 (2006.01); G03F 7/00 (2006.01); H01L 21/66 (2006.01); G01B 11/27 (2006.01)
CPC G01N 21/9501 (2013.01) [G01N 21/8806 (2013.01); G01N 21/956 (2013.01); G03F 7/70633 (2013.01); H01L 22/12 (2013.01); G01B 11/27 (2013.01); G03F 7/706837 (2023.05); G03F 7/706847 (2023.05); G03F 7/706849 (2023.05)] 20 Claims
OG exemplary drawing
 
1. A substrate inspection apparatus, comprising:
a light irradiator including an objective lens and a plurality of optical fibers, wherein the objective lens is configured to irradiate light to an illumination area on a semiconductor substrate having a plurality of circuit pattern layers, the plurality of optical fibers are adjacent a perimeter of the objective lens and are configured to irradiate the light to a peripheral area adjacent the illumination area;
a light generator configured to generate the light, wherein the light generator is configured to change an irradiation angle of the light to selectively irradiate the light to one or more of the objective lens and the plurality of optical fibers; and
a light analyzer configured to obtain images of the plurality of circuit pattern layers from the light reflected from the illumination area and the peripheral area, wherein the light analyzer is configured to model each of the plurality of circuit pattern layers of the semiconductor substrate to obtain image models and to measure an overlay between the plurality of circuit pattern layers with the images and the image models.