| CPC B65G 47/90 (2013.01) | 20 Claims |

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1. A gate/barrier assembly for a semiconductor processing system, comprising:
a first post configured to be fixedly supported by the semiconductor processing system;
a second post extending in parallel with the first post and configured to be pivotably supported by the semiconductor processing system;
a gate pivotably supported by the first post and having a closed position and an open position, the gate overlapping the second post in the closed position, the gate spaced from the second post in the open position; and
a barrier fixedly supported by the second post and having a guard position and a guide position, the barrier abutting the first post in the guard position, the barrier spaced from first post in the guide position;
wherein the gate overlaps the barrier when the gate is in the closed position and the barrier is in the guard position.
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