US RE50,101 E1
Memory system in which extended function can easily be set
Akihisa Fujimoto, Yamato (JP); and Hiroyuki Sakamoto, Ome (JP)
Assigned to KIOXIA CORPORATION, Minato-ku (JP)
Filed by KIOXIA CORPORATION, Minato-ku (JP)
Filed on Mar. 14, 2022, as Appl. No. 17/693,840.
Application 17/693,840 is a continuation of application No. 16/452,252, filed on Jun. 25, 2019, granted, now RE48997.
Application 16/452,252 is a continuation of application No. 15/463,765, filed on Mar. 20, 2017, granted, now RE47542, issued on Jul. 30, 2019.
Application 14/797,867 is a continuation of application No. 13/956,825, filed on Aug. 1, 2013, granted, now 9,104,539, issued on Aug. 11, 2015.
Application 13/956,825 is a continuation of application No. PCT/JP2011/071776, filed on Sep. 16, 2011.
Application 15/463,765 is a reissue of application No. 14/797,867, filed on Jul. 13, 2015, granted, now 9,335,953, issued on May 10, 2016.
Application 17/693,840 is a reissue of application No. 14/797,867, filed on Jul. 13, 2015, granted, now 9,335,953, issued on May 10, 2016.
Claims priority of application No. 2011-023217 (JP), filed on Feb. 4, 2011; and application No. 2011-110242 (JP), filed on May 17, 2011.
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 13/00 (2006.01); G06F 3/06 (2006.01); G06F 9/30 (2018.01); G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 13/28 (2006.01); G11C 5/00 (2006.01)
CPC G06F 12/00 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 9/30134 (2013.01); G06F 12/0238 (2013.01); G11C 5/00 (2013.01)] 11 Claims
OG exemplary drawing
 
[ 16. A memory system carrying out interface processing between a host device and a memory device connectable to the host device, with use of a read command from the host device applied to the memory device,
the memory device includes a nonvolatile memory and control circuitry,
the control circuitry is configured to control the nonvolatile memory and an extension register space comprised of a plurality of extension registers,
the extension register space defining an interface controlling an extended function and storing information,
the information includes address information indicating a place where one extension register among the plurality of extension registers for controlling the extended function is stored and specifies the extended function and a controllable driver,
the read command applied from the host device to the memory device includes a first bit which indicates a page in the extension registers and a second bit which indicates a start position of data in the page to be read, and
the memory device reads data to the host device in accordance with the first bit and the second bit of the read command. ]