CPC H10N 70/882 (2023.02) [G11C 13/003 (2013.01); H10N 70/826 (2023.02)] | 25 Claims |
1. A method, comprising:
applying a voltage to a chalcogenide element of a memory system;
increasing the applied voltage at least until the applied voltage satisfies a threshold voltage associated with the chalcogenide element;
detecting a time at which the applied voltage satisfies the threshold voltage associated with the chalcogenide element;
detecting a state of an oscillating signal as of the time at which the applied voltage satisfies the threshold voltage; and
outputting a logic value based at least in part on the state of the oscillating signal as of the time at which the applied voltage satisfies the threshold voltage.
|