US 12,075,686 B2
Display substrate with virtual subpixels, manufacturing method thereof, and display device
Bo Zhang, Beijing (CN); Xiangdan Dong, Beijing (CN); Junxi Wang, Beijing (CN); Yixiang Yang, Beijing (CN); Yulong Wei, Beijing (CN); Jie Gou, Beijing (CN); and Rong Wang, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/280,122
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Jun. 24, 2020, PCT No. PCT/CN2020/097902
§ 371(c)(1), (2) Date Mar. 25, 2021,
PCT Pub. No. WO2021/258318, PCT Pub. Date Dec. 30, 2021.
Prior Publication US 2022/0045141 A1, Feb. 10, 2022
Int. Cl. H10K 59/88 (2023.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01)
CPC H10K 59/88 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display substrate, comprising a base substrate and a plurality of subpixels arranged on the base substrate in an array form, wherein the plurality of subpixels comprises a plurality of display subpixels at a display region of the display substrate and a plurality of virtual subpixels, and at least a part of the virtual subpixels are arranged adjacent to the display subpixels;
the display subpixel comprises a display subpixel driving circuit, the display subpixel driving circuit comprises a driving transistor, a first transistor and a second transistor, and a gate electrode of the driving transistor is coupled to a second electrode of the first transistor and a second electrode of the second transistor; and
the virtual subpixel comprises a first potential signal line pattern, a virtual subpixel driving circuit comprising a virtual driving transistor and a first conductive connection member coupled to a gate electrode of the virtual driving transistor, and a second conductive connection member coupled to the first conductive connection member and the first potential signal line pattern.