US 12,075,670 B2
Display device
Hee Rim Song, Yongin-si (KR); Kyung Hoon Kim, Yongin-si (KR); Mee Hye Jung, Yongin-si (KR); Min Jae Jeong, Yongin-si (KR); and Seon Young Choi, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Oct. 14, 2022, as Appl. No. 17/966,691.
Application 17/966,691 is a continuation of application No. 17/097,114, filed on Nov. 13, 2020, granted, now 11,476,318.
Application 17/097,114 is a continuation of application No. 16/564,650, filed on Sep. 9, 2019, granted, now 10,840,321.
Application 16/564,650 is a continuation of application No. 16/111,908, filed on Aug. 24, 2018, granted, now 10,411,083, issued on Sep. 10, 2019.
Claims priority of application No. 10-2017-0127882 (KR), filed on Sep. 29, 2017.
Prior Publication US 2023/0037775 A1, Feb. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); G09G 3/3225 (2016.01); H01L 27/12 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 59/40 (2023.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01)
CPC H10K 59/131 (2023.02) [G09G 3/3225 (2013.01); H01L 27/1222 (2013.01); H01L 27/124 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/1315 (2023.02); H10K 59/40 (2023.02); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0809 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0223 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A display device, comprising:
a substrate comprising a display region and a non-display region;
a plurality of pixels provided in the display region, at least one pixel among the plurality of pixels including a first transistor, a storage capacitor, and a light emitting element having an anode electrically connected to the first transistor; and
a power portion applying a first power voltage to the pixels, the power portion including a first sub-power portion, a second sub-power portion, and a third sub-power portion disposed on different layers from each other,
wherein:
the first transistor includes a first active pattern disposed on the substrate and a first gate electrode overlapping the first active pattern, and
the first gate electrode is configured to be a lower electrode of the storage capacitor,
wherein:
the first sub-power portion is disposed on the first gate electrode with a first insulating layer interposed therebetween and includes an upper electrode of the storage capacitor,
the second sub-power portion is disposed on the first sub-power portion with a second insulating layer interposed therebetween, and
the third sub-power portion is disposed on the second sub-power portion with a third insulating layer interposed therebetween,
wherein at least one of the first to third sub-power portions has a mesh shape in the display region,
wherein each of the first, second, and third sub-power portions is disposed in the display region.