| CPC H10K 59/124 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/123 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 2102/351 (2023.02)] | 17 Claims |
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1. A display panel comprising:
a substrate;
a transistor comprising a semiconductor layer on the substrate and a gate electrode overlapping a part of the semiconductor layer;
a plurality of inorganic insulating layers on the semiconductor layer, each of the plurality of inorganic insulating layers having an opening;
a conductive electrode on the plurality of inorganic insulating layers and electrically connected to a region of the semiconductor layer of the transistor; and
a metal layer between the substrate and the semiconductor layer of the transistor,
wherein the substrate comprises:
a first region in which a first display element is positioned;
a second region in which a second display element is positioned; and
a third region in which the opening is positioned,
wherein the transistor and the metal layer are in the second region and the transistor is electrically connected to the second display element.
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