	US 12,075,636 B2
	Threshold voltage-modulated memory device using variable-capacitance and methods of forming the same
Fa-Shen Jiang, Taoyuan (TW); Hsia-Wei Chen, Taipei (TW); Hai-Dang Trinh, Hsinchu (TW); and Hsun-Chung Kuang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Jul. 25, 2023, as Appl. No. 18/358,867.
Application 18/358,867 is a division of application No. 17/227,438, filed on Apr. 12, 2021, granted, now 11,856,801.
Claims priority of provisional application 63/039,534, filed on Jun. 16, 2020.
Prior Publication US 2023/0371288 A1, Nov. 16, 2023
Int. Cl. G11C 11/00 (2006.01); H10B 99/00 (2023.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01)

CPC H10B 99/00 (2023.02) [G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01)]

20 Claims

1. A method of operating a memory device, comprising:

providing a memory device including a field effect transistor and a variable-capacitance capacitor, wherein the field effect transistor comprises a gate structure comprising a gate dielectric and an intermediate electrode, and the variable-capacitance capacitor comprises a lower capacitor plate comprising the intermediate electrode, an upper capacitor plate comprising a control gate electrode, and a variable-capacitance node dielectric located between the lower capacitor plate and the upper capacitor plate, wherein a threshold voltage of the field effect transistor while the intermediate electrode is electrically floating is dependent on a dielectric state of the variable-capacitance node dielectric; and

programming the dielectric state of the variable-capacitance node dielectric into a target dielectric state that is selected from a first dielectric state providing a first capacitance to the variable-capacitance capacitor and a second dielectric state providing a second capacitance to the variable-capacitance capacitor.