CPC H04W 72/23 (2023.01) [H04L 1/1812 (2013.01); H04L 5/0007 (2013.01); H04L 5/0048 (2013.01)] | 19 Claims |
1. An integrated circuit, comprising:
reception circuitry, which, in operation, controls receiving Hybrid Automatic Repeat request-Acknowledgement (HARQ-ACK) bits, Channel State Information (CSI) bits and data in a Physical Uplink Shared Channel (PUSCH) by using Cyclic Prefix-Orthogonal Frequency Division Multiplexing (CP-OFDM) in 14 OFDM symbols; and
demodulation circuitry, which, in operation, controls demodulating the HARQ-ACK bits;
wherein the HARQ-ACK bits are mapped to two non-consecutive first OFDM symbols in the 14 OFDM symbols which are different from two non-consecutive second OFDM symbols,
wherein demodulation reference signals (DMRSs) are mapped to a part of assigned subcarriers of the two non-consecutive second OFDM symbols,
wherein one of the two non-consecutive first OFDM symbols is adjacent to and later than one of the two non-consecutive second OFDM symbols, and another one of the two non-consecutive first OFDM symbols is adjacent to and later than another one of the two non-consecutive second OFDM symbols,
wherein the CSI bits are mapped to a third OFDM symbol which is different from the two non-consecutive first OFDM symbols, and
wherein the HARQ-ACK bits are mapped to distributed resource elements in a frequency domain within allocated resource blocks.
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