CPC H04W 72/0446 (2013.01) [H04L 1/1854 (2013.01); H04L 1/1861 (2013.01); H04L 5/001 (2013.01); H04L 5/0085 (2013.01); H04W 72/23 (2023.01); H04W 84/042 (2013.01); H04W 88/02 (2013.01)] | 16 Claims |
1. An integrated circuit comprising:
transmission circuitry, which, in operation, controls transmitting a higher layer signaling that indicates a reference configuration pattern that is a reference uplink/downlink (UL/DL) configuration, which is one of a plurality of configuration patterns, each configuration pattern defining allocation of one or more uplink subframe(s) and one or more downlink subframe(s) within a frame and, in operation, controls transmitting a downlink signaling for determining a configuration pattern for a component carrier,
wherein if the transmitted downlink signaling is received by a terminal apparatus, the configuration pattern for the component carrier is determined at the terminal apparatus according to the received downlink signaling, and wherein when the determined configuration pattern is different from the reference UL/DL configuration, the reference UL/DL configuration defines the allocation of the one or more uplink subframe(s) that are inclusive of one or more second uplink subframe(s) defined by the determined configuration pattern, and the reference UL/DL configuration defines at least one more uplink subframe than defined by the determined configuration pattern; and
reception circuitry, which, in operation, controls receiving an uplink signal on an uplink subframe of the component carrier, the uplink subframe being one of the one or more second uplink subframe(s) defined by the determined configuration pattern.
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