CPC H04W 52/0232 (2013.01) [H04W 52/0235 (2013.01); H04W 52/0274 (2013.01)] | 16 Claims |
12. An apparatus for controlling a sleep state of a terminal, comprising:
a processor; and
memory storing instructions executable by the processor;
wherein the processor is configured to:
monitor for a wake-up signal; and
enter a sleep state from an activated state based on a monitoring result of the wake-up signal,
wherein the processor is further configured to:
determine reference information based on the monitoring result of the wake-up signal, wherein the reference information comprises at least one of: the number of times of continuous failure to receive the wake-up signal, or a duration of continuous failure to receive the wake-up signal;
enter the sleep state from the activated state based on the reference information.
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