CPC H04W 48/08 (2013.01) [H04W 4/021 (2013.01); H04W 16/22 (2013.01); H04W 48/16 (2013.01)] | 20 Claims |
1. A computing device comprising:
one or more processors; and
a memory comprising instructions that when executed by the one or more processors cause the one or more processors to:
obtain information for a plurality of tracking areas including a first tracking area and a second tracking area, the first tracking area comprising a plurality of first cells and the second tracking area comprising a plurality of second cells;
generate, based on the information for the plurality of tracking areas, a user interface providing a visual representation of the plurality of tracking areas, wherein the user interface comprises first cell user interface elements each providing a visual representation of a corresponding cell of the plurality of first cells of the first tracking area and second cell user interface elements each providing a visual representation of a corresponding cell of the plurality of second cells of the second tracking area;
output the user interface for display at a display device;
receive user input data indicative of filtering criteria to filter the user interface;
generate, based on the user input data indicative of filtering criteria, a modified user interface by modifying at least one of the first cell user interface elements or the second cell user interface elements to visually indicate the first tracking area comprising the plurality of first cells satisfies the filtering criteria and the second tracking area comprising the plurality of second cells does not satisfy the filtering criteria; and
output the modified user interface for display at the display device.
|