US 12,075,223 B2
Process of fabricating capacitive microphone comprising movable composite conductor and stationary single conductor
Guanghua Wu, Dublin, CA (US); Xingshuo Lan, San Jose, CA (US); and Zhixiong Xiao, Fremont, CA (US)
Assigned to GMEMS TECH SHENZHEN LIMITED, Shenzhen (CN)
Filed by GMEMS TECH SHENZHEN LIMITED, Shenzhen (CN)
Filed on Jul. 9, 2021, as Appl. No. 17/305,593.
Application 17/008,638 is a division of application No. 15/730,732, filed on Oct. 12, 2017, granted, now 10,798,508, issued on Oct. 6, 2020.
Application 17/305,593 is a continuation in part of application No. 17/120,170, filed on Dec. 13, 2020, granted, now 11,765,534.
Application 17/120,170 is a continuation in part of application No. 17/008,638, filed on Sep. 1, 2020, granted, now 11,546,711.
Application 15/730,732 is a continuation in part of application No. 15/623,339, filed on Jun. 14, 2017, granted, now 10,244,330, issued on Mar. 26, 2019.
Application 15/623,339 is a continuation in part of application No. 15/393,831, filed on Dec. 29, 2016, granted, now 10,171,917, issued on Jan. 1, 2019.
Prior Publication US 2021/0345054 A1, Nov. 4, 2021
Int. Cl. H04R 31/00 (2006.01); H04R 19/04 (2006.01)
CPC H04R 31/00 (2013.01) [H04R 19/04 (2013.01); H04R 2201/003 (2013.01); H04R 2410/03 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A process of fabricating a capacitive microphone comprising:
(A) fabricating a first capacitor and a second capacitor, and configuring the two capacitors so that a signal output S1 of the first capacitor is substantially (±5%) the additive inverse of a signal output S2 of the second capacitor, and a total signal output St is a difference between S1 and S2; and
wherein fabricating the first capacitor comprises fabricating a first electrical conductor ECA1, fabricating a second electrical conductor ECA2, and configuring conductors ECA1 and ECA2 in a lateral mode as defined in the following:
wherein conductors ECA1 and ECA2 have a mutual capacitance therebetween;
wherein said mutual capacitance can be varied by an acoustic pressure impacting upon ECA1 and/or ECA2 along a range of impacting directions in 3D space, generating the signal output S1 of the first capacitor;
wherein said mutual capacitance is varied the most by an acoustic pressure impacting upon ECA1 and/or ECA2 along one direction among said range of impacting directions, said one direction being defined as the primary direction;
wherein ECA1 has a first projection along said primary direction on a conceptual plane that is perpendicular to said primary direction; and ECA2 has a second projection along said primary direction on the conceptual plane;
wherein the first projection and the second projection have a shortest distance Dmin therebetween, and Dmin remains greater than zero regardless of that ECA1 and/or ECA2 is (are) impacted by an acoustic pressure along said primary direction or not;
wherein fabricating the second capacitor comprises fabricating a third electrical conductor ECB1 and a fourth electrical conductor ECB2, and configuring the conductors ECB1 and ECB2 in a lateral mode too;
wherein the process further comprises configuring the two capacitors so that the first capacitor and the second capacitor share a same primary direction,
wherein the process further comprises a step (Pre-A) before step (A) providing a substrate wherein the substrate can be viewed as said conceptual plane; and constructing conductors ECA1 and ECA2 above the substrate side-by-side and constructing conductors ECB1 and ECB2 above the substrate de-by-side too;
wherein the process further comprises configuring one of conductors ECA1 and ECA2 so that it is electrically connected to one of conductors ECB1 and ECB2 to form a single shared conductor;
wherein the process comprises fixing single conductor ECA2B1 relatively to the substrate, electrically separating but physically combining conductors ECA1 and ECB2 into a composite conductor ECA1B2 comprising a membrane that is movable relative to the substrate, and said primary direction is perpendicular to the membrane plane; and
wherein the process comprises fabricating conductor ECA1 in the composite conductor ECA1B2 so that it comprises a flat layer in parallel to the substrate and having a thickness ECA1t and a height ECA1h along the primary direction as measured from the substrate,
fabricating conductor ECB2 in the composite conductor ECA1B2 so that it comprises a flat layer in parallel to the substrate and having a thickness ECB2t and a height ECB2h along the primary direction as measured from the same subsrate;
fabricating single conductor ECA2B1 so that it comprises a portion ECA2* facing conductor ECA1, wherein portion ECA2* comprises a flat layer in parallel to the substrate and having a thickness ECA2*t and a height ECA2*h along the primary direction as measured from the same subsrate, and
fabricating single conductor ECA2B1 so that it comprises a portion ECB1* facing conductor ECB2, wherein portion ECB1* comprises a flat layer in parallel to the substrate and having a thickness ECB1*t and a height ECB1*h along the primary direction as measured from the same substrate.