CPC H04L 25/0222 (2013.01) [H04W 52/52 (2013.01); H04W 52/54 (2013.01)] | 27 Claims |
1. An apparatus for wireless communication at a first sidelink device, comprising:
a memory; and
one or more processors coupled to the memory, wherein the one or more processors are configured to cause the first sidelink device to:
transmit, to a second sidelink device, first information at a first symbol of a first slot, wherein the first slot includes at least the first symbol and a first reference signal, and wherein the first symbol of the first slot is a last data symbol of the first slot or a guard symbol; and
transmit second information at a second symbol of a second slot, wherein the second slot includes at least the second symbol and a second reference signal, and wherein the second information includes a repetition of at least a portion of a data transmission or at least a portion of a demodulation reference signal (DMRS) from the first symbol of the first slot.
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