US 12,074,700 B2
Integrated circuit
Seigo Nakao, Osaka (JP); Akihiko Nishio, Osaka (JP); and Daichi Imamura, Kanagawa (JP)
Assigned to Sun Patent Trust, New York, NY (US)
Filed by Sun Patent Trust, New York, NY (US)
Filed on Oct. 6, 2021, as Appl. No. 17/450,143.
Application 17/450,143 is a continuation of application No. 16/707,341, filed on Dec. 9, 2019, granted, now 11,171,752.
Application 16/707,341 is a continuation of application No. 16/179,218, filed on Nov. 2, 2018, granted, now 10,536,245, issued on Jan. 14, 2020.
Application 16/179,218 is a continuation of application No. 15/797,132, filed on Oct. 30, 2017, granted, now 10,153,876, issued on Dec. 11, 2018.
Application 15/797,132 is a continuation of application No. 15/267,049, filed on Sep. 15, 2016, granted, now 9,831,993, issued on Nov. 28, 2017.
Application 15/267,049 is a continuation of application No. 14/166,555, filed on Jan. 28, 2014, granted, now 9,479,302, issued on Oct. 25, 2016.
Application 14/166,555 is a continuation of application No. 13/255,474, granted, now 8,675,626, issued on Mar. 18, 2014, previously published as PCT/JP2010/001749, filed on Mar. 11, 2010.
Claims priority of application No. 2009-059501 (JP), filed on Mar. 12, 2009.
Prior Publication US 2022/0029760 A1, Jan. 27, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 1/00 (2006.01); H04L 5/00 (2006.01); H04W 28/06 (2009.01); H04W 72/23 (2023.01); H04L 27/26 (2006.01); H04W 72/20 (2023.01)
CPC H04L 1/0028 (2013.01) [H04L 5/001 (2013.01); H04L 5/0044 (2013.01); H04L 5/0053 (2013.01); H04W 28/06 (2013.01); H04W 72/23 (2023.01); H04L 1/0027 (2013.01); H04L 5/0007 (2013.01); H04L 27/2634 (2013.01); H04L 27/2647 (2013.01); H04W 72/20 (2023.01)] 9 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
generation circuitry, which, in operation, controls:
appending zeros to downlink control information according to a basic payload size; and
mapping the downlink control information to at least one of a plurality of downlink component carriers that include a primary downlink component carrier; and
transmission circuitry, which, in operation, controls transmitting the downlink control information,
wherein:
the basic payload size of the downlink control information mapped to the primary downlink component carrier is calculated using a number of information bits obtained from a bandwidth of the primary downlink component carrier, and a number of information bits obtained from a bandwidth of an uplink component carrier; and
the basic payload size of the downlink control information mapped to a downlink component carrier other than the primary downlink component carrier is calculated using a number of information bits obtained from a bandwidth of the downlink component carrier other than the primary downlink component carrier.