US 12,074,622 B2
Methods, circuits, systems and apparatus providing audio sensitivity enhancement in a wireless receiver, power management and other performances
Jaiganesh Balakrishnan, Bangalore (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 17, 2023, as Appl. No. 18/318,800.
Application 14/323,280 is a division of application No. 13/193,088, filed on Jul. 28, 2011, granted, now 8,805,312, issued on Aug. 12, 2014.
Application 18/318,800 is a continuation of application No. 17/530,158, filed on Nov. 18, 2021, granted, now 11,695,440.
Application 17/530,158 is a continuation of application No. 16/838,685, filed on Apr. 2, 2020, granted, now 11,211,959, issued on Dec. 28, 2021.
Application 16/838,685 is a continuation of application No. 14/323,280, filed on Jul. 3, 2014, granted, now 10,644,738, issued on May 5, 2020.
Claims priority of application No. 1167/CHE/2011 (IN), filed on Apr. 6, 2011.
Prior Publication US 2023/0336200 A1, Oct. 19, 2023
Int. Cl. H04B 1/12 (2006.01); H04B 1/10 (2006.01); H04B 1/16 (2006.01); H04B 17/20 (2015.01); H04B 17/318 (2015.01); H04B 17/336 (2015.01); H04H 40/72 (2008.01)
CPC H04B 1/12 (2013.01) [H04B 1/10 (2013.01); H04B 1/1027 (2013.01); H04B 1/1646 (2013.01); H04B 17/20 (2015.01); H04B 17/318 (2015.01); H04B 17/336 (2015.01); H04H 40/72 (2013.01); H04B 2001/1054 (2013.01)] 23 Claims
OG exemplary drawing
 
1. An electronic circuit comprising:
a down-converter configured to down-convert a first signal at a first frequency to a second signal at an intermediate frequency (IF) that is lower than the first frequency; and
a digital processor circuit comprising:
a de-rotator configured to convert the second signal from the IF to a baseband signal having a baseband frequency that is lower than the IF,
a channel select filter comprising a first filter stage and a second filter stage, wherein the channel select filter is configured to filter the baseband signal to generate a filtered baseband signal, wherein the digital processor circuit is configured to, in a first mode, enable the second filter stage, and in a second mode, disable the second filter stage, and wherein an audio sensitivity associated with the filtered baseband signal is higher during the second mode than during the first mode.