US 12,074,607 B2
Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options
Narasimhan Rajagopal, Chennai (IN); Nithin Gopinath, Bengaluru (IN); Viswanathan Nagarajan, Bengaluru (IN); Neeraj Shrivastava, Bengaluru (IN); Visvesvaraya A. Pentakota, Bengaluru (IN); Harshit Moondra, Mumbai (IN); and Abhinav Chandra, Bengaluru (IN)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 26, 2022, as Appl. No. 17/825,864.
Prior Publication US 2023/0387932 A1, Nov. 30, 2023
Int. Cl. H03M 1/10 (2006.01)
CPC H03M 1/1014 (2013.01) 21 Claims
OG exemplary drawing
 
1. A circuit comprising:
a nonlinear analog-to-digital converter (ADC) having a nonlinear ADC input and a nonlinear ADC output, the nonlinear ADC is configured to:
receive an analog input signal at the nonlinear ADC input; and
provide a first digital output signal at the nonlinear ADC output based on the analog input signal;
a linearization circuit having a linearization circuit input, a linearization circuit output and a lookup table (LUT) memory configured to store initial calibration data, the linearization circuit input is coupled to the nonlinear ADC output and the linearization circuit is configured to:
determine updated calibration data based on the initial calibration data;
replace the initial calibration data in the LUT memory with the updated calibration data; and
provide a second digital output signal at the linearization circuit output based on the first digital output signal and the updated calibration data; and
a calibration control circuit coupled to the linearization circuit, and the calibration control circuit is configured to:
access the initial calibration data stored in the LUT memory; and
average the initial calibration data to determine the updated calibration data.