US 12,074,227 B2
Semiconductor device including deep trench capacitors and via contacts
Po-Chia Lai, Fremont, CA (US); and Stefan Rusu, Sunnyvale, CA (US)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 27, 2022, as Appl. No. 17/827,251.
Prior Publication US 2023/0387330 A1, Nov. 30, 2023
Int. Cl. H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 29/66 (2006.01); H01L 29/94 (2006.01); H01L 49/02 (2006.01); H10B 12/00 (2023.01)
CPC H01L 29/945 (2013.01) [H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 28/91 (2013.01); H01L 29/66181 (2013.01); H10B 12/37 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate having a plurality of first trenches extending along a first direction and a plurality of second trenches extending along a second direction that is perpendicular to the first direction;
a first conductive layer disposed over the first and second trenches of the semiconductor substrate;
a first dielectric layer disposed over the first conductive layer;
a second conductive layer disposed over the first dielectric layer;
a plurality of inner conductive structures disposed adjacent to the first and second trenches, wherein a first subset of the plurality of inner conductive structures is disposed between the first and second trenches; and
a plurality of outer conductive structures disposed adjacent to the plurality of inner conductive structures and farther to the first and second trenches than the plurality of inner conductive structures.