US 12,074,219 B2
Back channel field effect transistors using a pull back process and methods for forming the same
Yong-Jie Wu, Hsinchu (TW); Yen-Chung Ho, Hsinchu (TW); Hui-Hsien Wei, Taoyuan (TW); Chia-Jung Yu, Hsinchu (TW); Pin-Cheng Hsu, Zhubei (TW); Feng-Cheng Yang, Zhudong Township (TW); and Chung-Te Lin, Taiwan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Nov. 10, 2021, as Appl. No. 17/523,076.
Claims priority of provisional application 63/178,042, filed on Apr. 22, 2021.
Prior Publication US 2022/0344504 A1, Oct. 27, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01)
CPC H01L 29/786 (2013.01) [H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01); H01L 29/4908 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a gate electrode formed on the substrate;
a gate dielectric formed over a top surface of the gate electrode;
a source electrode located adjacent to a first side of the gate electrode;
a first etch-stop layer that separates the source electrode from the gate electrode and from the substrate;
a drain electrode located adjacent to a second side of the gate electrode;
a second etch-stop layer that separates the drain electrode from the gate electrode and from the substrate; and
a semiconductor layer formed over the source electrode, the drain electrode, and the gate dielectric.