US 12,074,142 B2
Semiconductor package and method of fabricating the same
Jongpa Hong, Suwon-si (KR); Hwail Jin, Seongnam-si (KR); and Sang-Sick Park, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 11, 2022, as Appl. No. 17/669,773.
Claims priority of application No. 10-2021-0078746 (KR), filed on Jun. 17, 2021.
Prior Publication US 2022/0406755 A1, Dec. 22, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 25/0657 (2013.01) [H01L 23/3157 (2013.01); H01L 23/481 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 25/50 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/17177 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81203 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a first die having a signal region and a peripheral region that surrounds the signal region, the first die including a plurality of first vias on the peripheral region;
a second die on the first die and having a plurality of second vias on the peripheral region, the plurality of second vias being on positions that correspond to positions of the first vias; and
a plurality of connection terminals between the first die and the second die, the plurality of connection terminals connecting the plurality of second vias to the plurality of first vias,
wherein the peripheral region includes a plurality of first regions and a plurality of second regions,
the plurality of first regions are adjacent to corners of the first die when viewed in a plan view, and
the plurality of second regions are adjacent to lateral surfaces of the first die when viewed in the plan view,
wherein the plurality of connection terminals include a plurality of first connection terminals on the plurality of first regions and a plurality of second connection terminals on the plurality of second regions, and
wherein a sum of areas of the plurality of first connection terminals per unit area on the plurality of first regions is greater than a sum of areas of the plurality of second connection terminals per unit area on the plurality of second regions.