CPC H01L 25/0652 (2013.01) [H01L 22/32 (2013.01); H01L 23/49827 (2013.01); H01L 23/5226 (2013.01); H01L 24/09 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 25/50 (2013.01); H01L 2224/02372 (2013.01)] | 20 Claims |
1. A package structure, comprising:
a plurality of first dies on first regions of a semiconductor substrate; and
a plurality of second dies electrically bonded to the plurality of first dies;
wherein the plurality of second dies cover a second region of the semiconductor substrate between the first regions of the semiconductor substrate,
wherein first portions of top surfaces of the plurality of first dies are covered by the plurality of second dies, and second portions of the top surfaces of the plurality of first dies are exposed by the plurality of second dies,
wherein the plurality of first dies are connected to the semiconductor substrate, and sandwiched between the semiconductor substrate and the plurality of second dies.
|