US 12,074,110 B2
Method for manufacturing semiconductor device
Ching-Kai Shen, Hsinchu County (TW); Yi-Chuan Teng, Hsinchu County (TW); Wei-Chu Lin, Hsinchu (TW); Hung-Wei Liang, New Taipei (TW); and Jung-Kuo Tu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Jul. 27, 2022, as Appl. No. 17/815,242.
Application 17/815,242 is a division of application No. 16/426,543, filed on May 30, 2019, granted, now 11,462,478.
Prior Publication US 2022/0367378 A1, Nov. 17, 2022
Int. Cl. H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/34 (2006.01); H01L 23/48 (2006.01)
CPC H01L 23/53295 (2013.01) [H01L 21/76898 (2013.01); H01L 23/3171 (2013.01); H01L 23/34 (2013.01); H01L 23/481 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
receiving a first substrate bonded to a second substrate by a dielectric layer, wherein a conductive layer is disposed in the dielectric layer and a cavity is formed between the first substrate, the second substrate and the dielectric layer;
forming a via opening in the second substrate to expose the conductive layer and a vent hole in the second substrate to couple to the cavity;
forming a first buffer layer covering sidewalk of the via opening and a second buffer layer covering sidewalk of the vent hole; and
forming a connecting structure in the via opening and a sealing structure to seal the vent hole.